Computer systems have historically used an “interrupt” mechanism to inform the processor of unexpected or rare activities or conditions. For example, invalid computation, arrival of network packets, and completion of a disk access all cause interrupts on a typical modern computer. Special hardware, not involved in the normal operation of the processor, detects the condition and signals the processor. Upon receiving an interrupt, the processor suspends its current task, performs the steps necessary to handle the condition, and then resumes its normal execution. This interrupt facility allows the computer to respond quickly to rare events without having to continually check, or “poll,” for them.
Multi-processor systems typically support an inter-processor interrupt, which allows one processor to interrupt another. Inter-processor interrupts are used to synchronize the activities of the different processors and to notify processors of changing conditions in the system or in the programs they are running. For example, when the status of a program, which is running on multiple processors, changes, this change must be reflected not only on the processor which detected the change, but on all processors involved in executing the program. Additionally, inter-processor interrupts may be used to notify a processor that an inter-processor message has arrived.
Delivery and reception of an inter-processor interrupt is relatively fast, but still takes many processor clock cycles. Interrupt controllers used to send and receive the interrupts are frequently separate from the processors, and require multi-cycle operations to manipulate. Also, actually sending the interrupt from one interrupt controller to another may require several processor clock cycles, for example, because processors typically execute at a faster clock rate than conventional interrupt controllers.
A multithreaded processor is a processor which supports simultaneous execution of multiple distinct instruction sequences or “threads.” The processing threads cooperate to use more of the computational power in the processor than a single thread alone. This cooperation typically leads to more synchronization and communication than is typical for a multi-processor system, thereby placing a higher premium on the cost of communication mechanisms such as cross-thread interrupts, that is, interrupts from one thread to another.
Existing multithreaded processors, such as Intel® processors utilizing “hyper-threading technology,” typically process cross-thread interrupts using techniques which emulate those used to process the previously described inter-processor interrupts in multi-processor systems. As a result, conventional techniques for processing cross-thread interrupts are unduly slow, and can require significant overhead in terms of processing resources. For example, a significant number of instruction execution cycles is typically required for one thread to interrupt another using conventional techniques.
As is apparent from the foregoing, a need exists for improved cross-thread interrupt processing techniques for use in a multithreaded processor.